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1 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 b141pw03 v0 ( v ) preliminary specifications ( ) final specifications module 14.1? wxga+ color tft-lcd model name b141pw03 v0 (hw 1a) customer date checked & approved by date note: this specification is subject to change witho ut notice. approved by date prepared by date nbbu marketing division / au optronics corporation www..net
2 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 contents 1. handling precautions............................ ................................................... ........ 4 2. general description............................. ................................................... .......... 5 2.1 general specification.......................... ................................................... ............................ 5 2.2 optical characteristics ........................ ................................................... ............................ 6 3. functional block diagram........................ ................................................... ... 11 4. absolute maximum ratings........................ ................................................... 12 4.1 absolute ratings of tft lcd module ............. ................................................... ............. 12 4.2 absolute ratings of backlight unit ............. ................................................... ................... 12 4.3 absolute ratings of environment................ ................................................... .................. 12 5. electrical characteristics ...................... ................................................... ...... 13 5.1 tft lcd module ................................. ................................................... ......................... 13 5.2 backlight unit................................. ................................................... ............................... 15 6. signal characteristic ........................... ................................................... ........ 17 6.1 pixel format image............................. ................................................... .......................... 17 6.2 the input data format.......................... ................................................... .......................... 18 6.3 signal description/pin assignment .............. ................................................... ................. 20 6.4 interface timing ............................... ................................................... ............................. 22 7. connector description ........................... ................................................... ..... 25 7.1 tft lcd module ................................. ................................................... ......................... 25 7.2 backlight unit................................. ................................................... ............................... 25 7.3 signal for lamp connector...................... ................................................... ...................... 25 8. dynamic test .................................... ................................................... ........... 26 8.1 vibration test ................................. ................................................... ............................... 26 8.2 shock test spec: ............................... ................................................... ........................... 26 9. reliability..................................... ................................................... ................. 27 10. mechanical characteristics ..................... ................................................... . 28 10.1 lcm outline dimension......................... ................................................... ..................... 28 10.2 screw hole depth and center position .......... ................................................... ............ 30 11. shipping and package ........................... ................................................... ... 31 11.1 shipping label format......................... ................................................... ....................... 31 11.2 carton package................................ ................................................... ........................... 32 11.3 shipping package of palletizing sequence ...... ................................................... ............ 32 12. appendix: edid description..................... ................................................... . 33 www..net
3 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 record of revision version and date page old description new description remark 0.1 2007/10/11 all first edition for customer 0.2 2007/11/26 33-36 edid change edid change 0.3 2007/12/28 22 clock frequency: 48.2 53.9 28-29 lcm outline dimension www..net
4 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 1. handling precautions 1) since front polarizer is easily damaged, pay att ention not to scratch it. 2) be sure to turn off power supply when inserting or disconnecting from input connector. 3) wipe off water drop immediately. long contact wi th water may cause discoloration or spots. 4) when the panel surface is soiled, wipe it with a bsorbent cotton or other soft cloth. 5) since the panel is made of glass, it may break o r crack if dropped or bumped on hard surface. 6) since cmos lsi is used in this module, take care of static electricity and insure human earth when handling. 7) do not open nor modify the module assembly. 8) do not press the reflector sheet at the back of the module to any directions. 9) in case if a module has to be put back into the packing container slot after once it was taken out from the container, do not press the cent er of the ccfl reflector edge. instead, press at the far ends of the ccfl reflecto r edge softly. otherwise the tft module may be damaged. 10) at the insertion or removal of the signal inter face connector, be sure not to rotate nor tilt the interface connector of the tft module. 11) after installation of the tft module into an en closure (notebook pc bezel, for example), do not twist nor bend the tft module even momentary. at designing the enclosure, it should be taken into consideration th at no bending/twisting forces are applied to the tft module from outside. otherwise the tft module may be damaged. 12) cold cathode fluorescent lamp (ccfl) in lcd con tains a small amount of mercury. please follow local ordinances or regulations for disposal . 13) small amount of materials having no flammabilit y grade is used in the lcd module. the lcd module should be supplied by power complied wit h requirements of limited power source (iec60950 or ul1950), or be applied exemptio n. 14) the lcd module is designed so that the ccfl in it is supplied by limited current circuit (iec60950 or ul1950). do not connect the ccfl in ha zardous voltage circuit. www..net
5 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 2. general description b141pw03 v0 is a color active matrix liquid crystal display composed of a tft lcd panel, a driver circuit, and backlight system. the screen fo rmat is intended to support the wxga+ (1440(h) x 900(v)) screen and 262k colors (rgb 6-bi ts data driver) without backlight inverter. all input signals are lvds interface compatible. b141pw03 v0 is designed for a display unit of noteb ook style personal computer and industrial machine. 2.1 general specification the following items are characteristics summary on the table at 25 condition: items unit specifications screen diagonal [mm] 357.7(14.1w?) active area [mm] 303.48 x 189.68 pixels h x v 1440x3(rgb) x 900 pixel pitch [mm] 0.21x0.21 pixel format r.g.b. vertical stripe display mode normally white white luminance (i ccfl =6.0ma) note: i ccfl is lamp current [cd/m 2 ] 200 typ. (5 points average) 180 min. (5 points average) (note1) luminance uniformity 1.25 max. (5 points) contrast ratio 400 typ response time [ms] 8 typ / 16max nominal input voltage vdd [volt] +3.3 typ. power consumption [watt] 6.3 max. weight [grams] 440 max. physical size [mm] l w t max 320.0 206.0 5.5 typical 319.5 205.5 - min 319.0 205.0 - electrical interface 2 channel lvds surface treatment ag, hardness 3h www..net
6 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 support color 262k colors ( rgb 6-bit ) temperature range operating storage (non-operating) [ o c] [ o c] 0 to +50 -20 to +60 rohs compliance rohs compliance 2.2 optical characteristics the optical characteristics are measured under stab le conditions at 25 (room temperature) : item unit conditions min. typ. max. note white luminance i ccfl =6.0ma [cd/m 2 ] 5 points average 180 200 - 1, 4, 5. [degree] [degree] horizontal (right) cr = 10 (left) - - 45 45 - - viewing angle [degree] [degree] vertical (upper) cr = 10 (lower) - - 20 35 - - 4, 9 luminance uniformity 5 points - - 1.25 1, 3, 4 luminance uniformity 13 points - - 1.65 2, 3, 4 cr: contrast ratio 300 400 - 4, 6 cross talk % 4 4, 7 [msec] rising - - - [msec] falling - - - response time [msec] rising + falling - 8 16 4, 8 red x 0.560 0.590 0.620 red y 0.300 0.330 0.360 green x 0.280 0.310 0.340 green y 0.540 0.570 0.600 blue x 0.125 0.155 0.185 blue y 0.105 0.135 0.165 white x 0.285 0.313 0.341 chromaticity of color coordinates (cie 1931) white y 0.309 0.329 0.349 4, 9 ntsc % cie 1931 42 45 - www..net
7 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 note 1: 5 points position (ref: active area) 1 2 3 4 5 h /4 h /4 h /4 h /4 h w w /4 w /4 w /4 w /4 note 2: 13 points position (ref: active area) w /4 w w /4 h h /4 h /4 h /4 h /4 7 9 1 0 w /4 1 8 w /4 1 0 1 0 1 0 1 0 2 3 1 3 1 2 4 5 6 1 1 note 3: the luminance uniformity of 5 or13 points i s defined by dividing the maximum luminance values by the minimum test point luminance note 4: measurement method w13 = maximum brightness of thirteen points minimum brightness of thirteen points maximum brightness of five points w5 = minimum brightness of five poi nts www..net
8 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 the lcd module should be stabilized at given temper ature for 30 minutes to avoid abrupt temperature ch ange during measuring. in order to stabilize the luminan ce, the measurement should be executed after lighti ng backlight for 30 minutes in a stable, windless and dark room. note 5 definition of average luminance of white (y l ): measure the luminance of gray level 63 at 5 points y l = [l (1)+ l (2)+ l (3)+ l (4)+ l (5)] / 5 l (x) is corresponding to the luminance of the poin t x at figure in note (1). note 6 definition of contrast ratio: contrast ratio is calculated with the following for mula. note 7 definition of cross talk (ct) ct = | y b ? y a | / y a 100 (%) where y a = luminance of measured location without gray level 0 pattern (cd/m 2 ) center of the screen tft - lcd module 50 cm photo detector lcd panel field=2 contrast ratio (cr)= brightness on the ?white? state brightness on the ?black? stat e www..net
9 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 y b = luminance of measured location with gray level 0 pattern (cd/m 2 ) note 8: definition of response time: the output signals of bm-7 or equivalent are measur ed when the input signals are changed from ?black? to ?white? (falling time) and from ?white? to ?black? (rising time), respectively. the response time inte rval between the 10% and 90% of amplitudes. refer to figure as below . s i g n a l ( r e l a t i v e v a l u e ) "black" tr tf "white" "white" 0% 10% 90% 100% www..net
10 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 note 9. definition of viewing angle viewing angle is the measurement of contrast ratio R 10, at the screen center, over a 180 horizontal an d 180 vertical range (off-normal viewing angles). th e 180 viewing angle range is broken down as follow s; 90 ( ) horizontal left and right and 90 ( ) vertical, high (up) and low (down). the measureme nt direction is typically perpendicular to the display surface with the scree n rotated about its center to develop the desired measurement viewing angle. www..net
11 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 3. functional block diagram the following diagram shows the functional block of the 14.1 inches wide color tft/lcd module: tft array/cell vdd lcd controller lcd drive board backlight unit 1440(r/g/b) x 3 x 900 gnd dc-dc converter ref circuit y-driver x-driver odd_ rxin0 odd_rxin1 odd_rxin2 odd_rxclkin (8 pairs lvds) jae fi-xb30sl-hf10 mating housing jae fi-x30h jst bhsr-02vs-1 mating type sm02b-bhss-1-tb lamp connector(2pin) l cd connector( 30 pin) even_ rxin0 even_rxin1 even_rxin2 even_rxclkin www..net
12 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 4. absolute maximum ratings an absolute maximum rating of the module is as foll owing: 4.1 absolute ratings of tft lcd module item symbol min max unit conditions logic/lcd drive voltage vin -0.3 +4.0 [volt] note 1,2 4.2 absolute ratings of backlight unit item symbol min max unit conditions ccfl current iccfl - 6.5 [ma] rms note 1,2 4.3 absolute ratings of environment item symbol min max unit conditions operating temperature top 0 +50 [ o c] note 3 operation humidity hop 5 95 [%rh] note 3 storage temperature tst -20 +60 [ o c] note 3 storage humidity hst 5 95 [%rh] note 3 note 1: at ta (25 ) note 2: permanent damage to the device may occur if exceed maximum values note 3: for quality performance, please refer to au o iis (incoming inspection standard) . twb=39c operating range storage range www..net
13 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 5. electrical characteristics 5.1 tft lcd module 5.1.1 power specification input power specifications are as follows; symble parameter min typ max units note vdd logic/lcd drive voltage 3.0 3.3 3.6 [volt] pdd vdd power - - 1.6 [watt] note 1/2 idd idd current - 350 450 [ma] note 1/2 i rush inrush current - - - [ma] note 3 vddrp allowable logic/lcd drive ripple voltage - - 100 [mv] p-p note 1 : maximum measurement condition black pattern note 2 typical measurement condition: mosaic pattern note 3 measure condition +5.0v +12.0v vcc r1 47k r2 1k vr1 47k sw1 sw mag-spst 1 2 f1 q3 ao6402 g d2 s d1 d5 d6 c1 1uf/16v q3 ao6402 g d2 s d1 d5 d6 c3 0.01uf/25v c2 1uf/25v (high to low) control signal (lcd module input) 90% 10% vin rising time 0v 3.3v 0.5ms www..net
14 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 5.1.2 signal electrical characteristics input signals shall be low or high-impedance state when vdd is off. it is recommended to refer the specifications of th c63lvdf84a (thine electronics inc.) in detail. signal electrical characteristics are as follows; parameter condition min max unit vth differential input high threshold (vcm=+1.2v) - 100 [mv] vtl differential input low threshold (vcm=+1.2v) -100 - [mv] vcm differential input common mode voltage 1.125 1.375 [v] note: lvds signal waveform vt h vcm vss www..net
15 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 5.2 backlight unit ccfl parameter guideline for ccfl inverter selectio n (ref. remark 1) parameter min typ max units condition ccfl current(i ccfl ) 2.0 6.0 6.5 [ma] rms (ta=25 ) note 1 , 6 ccfl frequency(f ccfl ) 50 62 70 [khz] (ta=25 ) note 2,3 ccfl startup voltage(vs) 1400 [volt] rms (ta= 0 ) note 4 ccfl startup voltage(vs) 1190 [volt] rms (ta= 25 ) note 4 ccfl voltage (reference) (v ccfl ) 585 650 715 [volt] rms (ta=25 ) note 5 ccfl power consumption (p ccfl ) - 3.9 4.3 [watt] (ta=25 ) note 5 ccfl life-time 12,000 - - hour (ta=25 ) note 7 to optimun tft lcd performance, the lamp inverter p wm frequesncy define as:210 +/-5 hz remark 1 : typ are auo recommended design points. 1-1 all of characteristics listed are measured unde r the condition using the auo test inverter. 1-2 in case of using an inverter other than listed, it is recommended to check the inverter carefully. sometimes, interfering noise stripes appear on the screen, and substandard luminance or flicker at low power may happen. 1-3 in designing an inverter, it is suggested to ch eck safety circuit very carefully. impedance of ccf l, for instance, becomes more than 1 [m ohm] when ccfl is damaged. 1-4 generally, ccfl has some amount of delay time a fter applying starting voltage. it is recommended t o keep on applying starting voltage for 1 [sec] until discharge. 1-5 ccfl discharge frequency must be carefully chos en so as not to produce interfering noise stripes o n the screen. 1-6 reducing ccfl current increases ccfl discharge voltage and generally increases ccfl discharge frequency. so all the parameters of an inverter sho uld be carefully designed so as not to produce too much leakage current from high-voltage output of th e inverter. note 1 : it should be employed the inverter which has ?dut y dimming?, if iccfl is less than 4ma. www..net
16 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 note 2: ccfl discharge frequency should be carefully deter mined to avoid interference between inverter and tf t lcd. note 3: the frequency range will not affect to lamp life a nd reliability characteristics. note 4: the output voltage of inverter should be able to g ive out a power after ballast capacitor , the gener ating capacity has to be larger than a lamp startup volta ge, otherwise backlight may has blinking for a mome nt after turns on or can not be turned on. note 5: calculator value for reference (i ccfl v ccfl =p ccfl ) note 6: requirements for a system inverter design, which i s intended to have a better display performance, a better power efficiency and a more reliable lamp, a re following. it shall help increase the lamp lifetime and reduce leakage current. a. the asymmetry rate of the inverter waveform shou ld be less than 10%. b. the distortion rate of the waveform should be wi thin 2 10%. * inverter output waveform had better be more simil ar to ideal sine wave. note 7: it is an edge-type blu with single ccfl, the life- time define as the brightness decay to 50% of origi nal value and under normal operation. www..net
17 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 6. signal characteristic 6.1 pixel format image following figure shows the relationship of the inpu t signals and lcd pixel format. r g b r g b r g b r g b r g b r g b r g b r g b 0 1 1438 1439 1st line 900th line www..net
18 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 6.2 the input data format signal name description r5 r4 r3 r2 r1 r0 red data 5 (msb) red data 4 red data 3 red data 2 red data 1 red data 0 (lsb) red-pixel data red-pixel data each red pixel's brightness data consists of these 6 bits pixel data. g5 g4 g3 g2 g1 g0 green data 5 (msb) green data 4 green data 3 green data 2 green data 1 green data 0 (lsb) green-pixel data green-pixel data each green pixel's brightness data consists of these 6 bits pixel data. b5 b4 b3 b2 b1 b0 blue data 5 (msb) blue data 4 blue data 3 blue data 2 blue data 1 blue data 0 (lsb) blue-pixel data blue-pixel data each blue pixel's brightness data consists of these 6 bits pixel data. rxclkin data clock the typical frequency is 53.9 mhz.. the signal is used to strobe the pixel data and de signals. www..net
19 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 all pixel data shall be valid at the falling edge when the de signal is high. de display timing this signal is strobed at the fal ling edge of rxclkin. when the signal is high, the pixel data shall be valid to be displayed. vs vertical sync the signal is synchronized to rxcl kin . hs horizontal sync the signal is synchronized to rx clkin . note: output signals from any system shall be low o r high-impedance state when vdd is off. www..net
20 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 6.3 signal description/pin assignment lvds is a differential signal technology for lcd in terface and high speed data transfer device. pin# signal name description 1 gnd ground 2 vdd +3.3v power supply 3 vdd +3.3v power supply 4 v edid +3.3v edid power 5 nc auo internal test 6 clk edid edid clock input 7 data edid edid data input 8 orxin0- lvds differential data input 9 orxin0+ lvds differential data input 10 gnd ground 11 orxin1- lvds differential data input 12 orxin1+ lvds differential data input 13 gnd ground 14 orxin2- lvds differential data input 15 orxin2+ lvds differential data input 16 gnd ground 17 orxclkin- lvds differential clock input 18 orxclkin+ lvds differential clock input 19 gnd ground 20 erxin0- lvds differential data input 21 erxin0+ lvds differential data input 22 gnd ground 23 erxin1- lvds differential data input 24 erxin1+ lvds differential data input 25 gnd ground 26 erxin2- lvds differential data input 27 erxin2+ lvds differential data input 28 gnd ground 29 erxclkin- lvds differential clock input 30 erxclkin+ lvds differential clock input www..net
21 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 note1: start from right side note2: input signals shall be low or high-impedance state when vdd is off. 30 1 connector www..net
22 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 6.4 interface timing 6.4.1 timing characteristics basically, interface timings should match the 1440x 900 /60hz manufacturing guide line timing. parameter symbol min. typ. max. unit frame rate - 50 60 hz clock frequency 1/ t clock 53.9 mhz period t v 904 912 2048 active t vd 900 900 900 vertical section blanking t vb 4 12 - t line period t h 760 880 1024 active t hd 720 720 720 horizontal section blanking t hb 40 160 - t clock note : de mode only www..net
23 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 6.4.2 timing diagram dotclk de t h t hb t hd de t v t vb t vd input timing definition ( de mode) t clock input data pixel 1 pixel 2 pixel 3 pixel n-1 pixel n invaild data invaild data pixel 1 www..net
24 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 6.5 power on/off sequence vdd power and lamp on/off sequence is as follows. i nterface signals are also shown in the chart. signals from any system shall be hi-z state or low level when vdd is off. power sequence timing value parameter min. typ. max. units t1 0.5 - 10 (ms) t2 0 - 50 (ms) t3 0 - 50 (ms) t4 400 - - (ms) t5 200 - - (ms) t6 200 - - (ms) t7 0 - 10 (ms) t4 t3 t2 t5 valid data t1 10% 90% 10% 90% t6 t 7 power supply vdd lvds interface backlight on www..net
25 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 7. connector description physical interface is described as for the connecto r on module. these connectors are capable of accommodating the f ollowing signals and will be following components. 7.1 tft lcd module connector name / designation for signal connector manufacturer jae or compatible type / part number fi-xb30sl-hf10 or compatible mating housing/part number fi-x30h or compatible 7.2 backlight unit physical interface is described as for the connecto r on module. these connectors are capable of accommodating the f ollowing signals and will be following components. connector name / designation for lamp connector manufacturer jst type / part number bhsr-02vs-1 mating type / part number sm02b-bhss-1-tb 7.3 signal for lamp connector pin # cable color signal name 1 pink lamp high voltage 2 white lamp low voltage www..net
26 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 8. dynamic test 8.1 vibration test test condition: acceleration: 1.5 g frequency: 10 - 500hz random sweep: 30 minutes each axis (x, y, z) 8.2 shock test spec: test condition: acceleration: 220 g , half sine wave active time: 2 ms pulse: +/-x,+/-y,+/-z , one time for each side remark: 1. ambient condition is 25 + 5 , relative humidity : 40% ~ 70% 2. non-packaged and non-operation www..net
27 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 9. reliability items required condition note temperature humidity bias ta= 40 , 90%rh, 300h high temperature operation ta= 50 , dry, 250h low temperature operation ta= 0 , 300h high temperature storage ta= 60 , 35%rh, 300h low temperature storage ta= -20 , 50%rh, 300h thermal shock test ta=-20 to 60 , duration at 30 min, 50 cycles esd contact : 8 kv air : 15 kv note 1 note1: according to en 61000-4-2 , esd class b: some perf ormance degradation allowed. no data lost . self-recoverable. no hardware failures. remark: mtbf (excluding the ccfl): 30,000 hours with a con fidence level 90% www..net
28 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 10. mechanical characteristics 10.1 lcm outline dimension www..net
29 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 www..net
30 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 10.2 screw hole depth and center position screw hole minimum depth, from side surface = 2.6 m m (ref. drawing) screw hole center location, from front surface = 3. 1 0.2mm (ref. drawing) screw torque: maximum 2.5 kgf-cm www..net
31 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 11. shipping and package 11.1 shipping label format manufactured 05/52 model no: b141pw03 au optronics made in taiwan (m1 ) v.0 h/w: 1a f/w:1 c us rohs ct: c abrp01 xxxxxxx pb www..net
32 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 11.2 carton package the outside dimension of carton is 454 (l)mm x 388 (w)mm x 352 (h)mm 11.3 shipping package of palletizing sequence www..net
33 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 12. appendix: edid description address function value value value note hex hex bin dec 00 header 00 00000000 0 01 ff 11111111 255 02 ff 11111111 255 03 ff 11111111 255 04 ff 11111111 255 05 ff 11111111 255 06 ff 11111111 255 07 00 00000000 0 08 eisa manuf. code lsb 06 00000110 6 09 compressed ascii af 10101111 175 0a product code 47 01000111 71 0b hex, lsb first 30 00110000 48 0c 32-bit ser # 00 00000000 0 0d 00 00000000 0 0e 00 00000000 0 0f 00 00000000 0 10 week of manufacture 01 00000001 1 11 year of manufacture 11 00010001 17 12 edid structure ver. 01 00000001 1 13 edid revision # 03 00000011 3 14 video input def. (digital i/p, non-tmds, crgb) 80 10000000 128 15 max h image size (rounded to cm) 1e 00011110 30 16 max v image size (rounded to cm) 13 00010011 19 17 display gamma (=(gamma*100)-100) 78 01111000 120 18 feature support (no dpms, active off, rgb, tmg blk#1) 0a 00001010 10 19 red/green low bits (lower 2:2:2:2 bits) 24 00100100 36 1a blue/white low bits (lower 2:2:2:2 bits) e5 11100101 229 1b red x (upper 8 bits) 97 10010111 151 1c red y/ higher 8 bits 54 01010100 84 1d green x 4f 01001111 79 1e green y 92 10010010 146 1f blue x 27 00100111 39 20 blue y 22 00100010 34 21 white x 50 01010000 80 22 white y 54 01010100 84 23 established timing 1 00 00000000 0 24 established timing 2 00 00000000 0 25 established timing 3 00 00000000 0 26 standard timing #1 01 00000001 1 www..net
34 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 27 01 00000001 1 28 standard timing #2 01 00000001 1 29 01 00000001 1 2a standard timing #3 01 00000001 1 2b 01 00000001 1 2c standard timing #4 01 00000001 1 2d 01 00000001 1 2e standard timing #5 01 00000001 1 2f 01 00000001 1 30 standard timing #6 01 00000001 1 31 01 00000001 1 32 standard timing #7 01 00000001 1 33 01 00000001 1 34 standard timing #8 01 00000001 1 35 01 00000001 1 36 pixel clock/10000 lsb 1c 00011100 28 37 pixel clock/10000 usb 2a 00101010 42 38 horz active lower 8bits a0 10100000 160 39 horz blanking lower 8bits f4 11110100 244 3a horzact:horzblnk upper 4:4 bits 51 01010001 81 3b vertical active lower 8bits 84 10000100 132 3c vertical blanking lower 8bits 1a 00011010 26 3d vert act : vertical blanking (upper 4:4 bit) 30 00110000 48 3e horzsync. offset 30 00110000 48 3f horzsync.width 20 00100000 32 40 vertsync.offset : vertsync.width 36 00110110 54 41 horz&vert sync offset/width upper 2bits 00 00000000 0 42 horizontal image size lower 8bits 2f 00101111 47 43 vertical image size lower 8bits bd 10111101 189 44 horizontal & vertical image size (upper 4:4 bits) 10 00010000 16 45 horizontal border (zero for internal lcd) 00 00000000 0 46 vertical border (zero for internal lcd) 00 00000000 0 47 signal (non-intr, norm, no stero, sep sync, neg pol ) 18 00011000 24 48 detailed timing/monitor 00 00000000 0 49 descriptor #2 00 00000000 0 4a 00 00000000 0 4b 0f 00001111 15 4c 00 00000000 0 4d 00 00000000 0 4e 00 00000000 0 4f 00 00000000 0 50 00 00000000 0 51 00 00000000 0 www..net
35 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 52 00 00000000 0 53 00 00000000 0 54 00 00000000 0 55 00 00000000 0 56 00 00000000 0 57 00 00000000 0 58 00 00000000 0 59 20 00100000 32 5a detailed timing/monitor 00 00000000 0 5b descriptor #3 00 00000000 0 5c 00 00000000 0 5d fe 11111110 254 5e 00 00000000 0 5f manufacture 41 01000001 65 a 60 manufacture 55 01010101 85 u 61 manufacture 4f 01001111 79 o 62 0a 00001010 10 63 20 00100000 32 64 20 00100000 32 65 20 00100000 32 66 20 00100000 32 67 20 00100000 32 68 20 00100000 32 69 20 00100000 32 6a 20 00100000 32 6b 20 00100000 32 6c detailed timing/monitor 00 00000000 0 6d descriptor #4 00 00000000 0 6e 00 00000000 0 6f fe 11111110 254 70 00 00000000 0 71 manufacture p/n 42 01000010 66 b 72 manufacture p/n 31 00110001 49 1 73 manufacture p/n 34 00110100 52 4 74 manufacture p/n 31 00110001 49 1 75 manufacture p/n 50 01010000 80 p 76 manufacture p/n 57 01010111 87 w 77 manufacture p/n 30 00110000 48 0 78 manufacture p/n 33 00110011 51 3 79 manufacture p/n 20 00100000 32 7a manufacture p/n 56 01010110 86 v 7b manufacture p/n 30 00110000 48 0 7c 20 00100000 32 www..net
36 of 36 au optronics corporation product specification auo b141pw03 v0 ver.0.3 7d 0a 00001010 10 7e extension flag 00 00000000 0 7f checksum 40 01000000 64 www..net

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